KYEC has successfully developed Vertical probe card (VCPC) for mass production. This advanced technology has an advantage over the mainstream products in the market in terms of fine pitch and pin count. Vertical P/C can overcome flaws of conventional cantilever probe cards. The disadvantages of cantilever probe card includes that the pins can easily be scorched because of low ability to withstand current and high pin counts are likely to negatively affect testing stability.
KYEC has the capacity to develop and manufacture Vertical probe card independently therefore comparing with the current standard costs of producing Vertical probe cars, our Vertical probe card is considerably less expensive. So our clients can benefit from competitive cost and better production efficiency.
Currently most high-end Mobile SoC (System on chip) products use the copper pillar package. These wafers of bump device are the mainstream in CP testing over the recent years. The advantages of Vertical P/C for bump devices are clear because it can be maintained and repaired rapidly, and decrease testing difficulty when used in products featuring high pin count or high current. For example: Vertical probe card can decrease site unbalance and crosstalk and test high-speed signals.
In 2018 KYEC started to develop 50um Vertical probe card and already have preliminary results. We are still accumulating production experience and ability.
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